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Solid State Tesla Coil Theory, et. al.

Updated Nov. 5, 2004

Discussions from The Tesla List.  The posts may be edited for clarity and are sorted by date & time

                                                                                                      New Ideas for the SSTC Guys *

DRSSTC design procedure – draft                                      Pushing the IGBT Envelope *

DRSSTC                                                                                      Resonance, and now Magnifiers *

DRSSTC Thoughts *                                                                SSTC Battle Discussion

Exact design for lossless SSTC's                                        SSTC Does 10 Foot Sparks

GDT discussions                                                                      Mode Splitting *   &

If Correct, This Will Change Everything *                           SSTC, Modes and Soft Switching *

Long Pulse IGBT GDT Design *

More SSTC Theory

* Recently Edited/Updated

Other Miscellaneous and Useful Info

1. July 15, 2004.  I have added a simple simulator to my SSTC design program. See the link at the end of the page:
   http://www.coe.ufrj.br/~acmq/tesla/sstc.html.  It simulates a square wave voltage drive, and calculates the voltages at the capacitors and currents at the inductors, plotting the waveforms. It can also produce a table. The effect of no load can be simulated too, for evaluation of the expected signals before breakout, in a low-loss system.  Note that, as I haven't yet built one of these things, I can't guarantee that that form of design is really good. But the simulations suggest that it is.  Antonio Carlos M. de Queiroz.

2. http://www.richieburnett.co.uk/sstate2.html    Richie Burnett's Solid State TC Theory

3. Dr. Gary Johnson's site with an extensive set of Tesla coil "white papers" covering all aspects of design:
   http://www.eece.ksu.edu/~gjohnson/tcchap1.pdf  This is the link to Chapter 1, increment the chapter number to get to all 9 chapters. I downloaded and printed all 9 chapters today, a full 3-ring binder of great theory and practical data.

4. James Pawson's site on SSTC design:  http://thedatastream.4hv.org/gdt_design.html gives much background on circuit design and fabrication for MOSFET driven SSTC's.

5. Jan Wagner's Tesla coil site with extensive circuit development info on SSTC's: http://www.hut.fi/~jwagner/tesla/. Scroll down till you get to the SSTC section. The last section on "self-resonant" SSTC design is very interesting, as it describes a driver circuit that continuously varies its frequency to match the resonant frequency of the secondary as its resonant F changes due to streamer loading, nearby objects, etc.

6. http://thedatastream.4hv.org/gdt_design.html  Important material here.

7. Check the Fairchild site for an "IGBT Basics" paper; a bit more complex than the "datastream" website, but interesting nevertheless.

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IGBT Data and Sources

http://www.dynexsemi.com/products/application_note/igbt.htm   

http://www.irf.com/technical-info/whitepaper/choosewisely.pdf  , http://hot-streamer.com/temp/IGBTdata/ 

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IGBT Manufacturers include (all have web presence, via Google).

On-Semiconductor
Fairchild Semiconductor
International Rectifier
Semikron USA
Infineon (ex. Siemens)
Dynex Semiconductor
Westcode
IXYS
Powerex
Toshiba
Mitsubishi
ST Microelectronics
APT (Advanced Power Technologies)
Fuji Semiconductors

Other Relevant Stuff

Date : Tue, 22 Jun 2004 20:13:43 -0600.  Subject : Re: Self-Resonant Driver Boards (DRSSTC, ISSTC, etc...)

Original poster: "Eastern Voltage Research Corporation" <dhmccauley@easternvoltageresearch.com>

> Good, because the way you had put it,  it seemed as though the circuit was only to protect the driver chips and not >the transistors in the bridge,  I guess that would go hand in hand though...

Correct.

> It might be wise to allow some sort of heatsinking on the driver chips, in case they would get warm,  But if you're >using the UCC27321,  I don't think that would be needed, as they have a wider temperature operating range.

Heatsinks really aren't needed.  If you do the calculations for power dissipation at 10-15% duty cycle running 20nF gate loads (-30 to +30V swings) with the UCC chips, there really is no heat dissipation at all.

Remember heat dissipation of the gate driver is:

C * V^2 * Freq * Duty * DividingFactor

C = capacitance of gate loads (typically 20nF + 20nF per paralleled set)
V = 60V (Yes, you are swinging from -30V to +30V with the current configurations that Steve and I use)
Freq = 50-200kHz (depends on coil)
Duty = 15%
Dividing Factor = (ON Resistance of Drivers/(SeriesGateResistor+ON Resistance Drivers)).  Dan.
 

Date : Tue, 22 Jun 2004 20:13:07 -0600.  Subject : Re: Self-Resonant Driver Boards (DRSSTC, ISSTC, etc...)

Original poster: "Eastern Voltage Research Corporation" <dhmccauley@easternvoltageresearch.com>

Really nothing to do with pulse width but more a concern of duty cycle.

PRF of the pulse (interrupter) frequency has little effect as its such a low frequency to begin with.

I wouldn't run more than a 10-15% duty cycle using the UCC drivers and those large FAIRCHILD IGBTs.  You have four UCC drivers (two 321 paralleled, and two 322's paralleled) and driving four (4) 15-20nF gate loads with the Fairchild IGBT's.

If you ran 100% duty cycle at 100kHz the dissipations on the UCC chips would be very high and burn them up very quickly.  Dan.

> What would be an example of too wide pulse width and too high PRF which would damage the UCC drive chips.

Finis